ZoTech Design Services

    ZoTech offers design services tailored to the customer’s specific requirements. We are experienced engineers who can put a customer’s algorithm into an FPGA starting from a behavioral model. Our designs run at maximum efficiency and at the maximum speed allowed by the FPGA, typically above 400 MHz. We currently provide design services for major players in the areas of wired and wireless communication as well as Xilinx itself.

Areas of Expertise

  • Behavioral Synthesis: Vivado HLS, Sysgen, SDAccel, SDSoC
  • RTL Synthesis: high speed design for FPGA in VHDL and Verilog (400 MHz+ for DSP-type algorithms).
  • Algorithmic languages: C/C++, OpenCL, Matlab, Python
  • Applications: wireless communication, image processing, data centers

New Technology Introduction and Support

ZoTech provides field support for different technologies that enable C programmability of FPGA. This includes

  • High level synthesis
    • VHLS compiler from Xilinx
    • Open source compiler
    • Other HLS compilers such as  Catapult C etc.
  • Libraries for FPGA 
    • communication IP
    • image processing functions
    • linear algebra functions

Why work with ZoTech

  • We are working closely with Xilinx HQ, doing design both for Xilinx customers and Xilinx themselves.
  • We are experts in High Level Synthesis (HLS). We have proven solutions, such as a Viterbi Decoder written in HLS, that are able to outperform Xilinx’s own IP written in Verilog.
  • We are closely involved in developing software/hardware co-design solutions using Xilinx tools such as SDAccel (OpenCL environment) and SDSoC (Zync single programming platform).